Publications
2021
Journals
1. Improving the reliability of SRAM-based PUFs under varying operation conditions and aging degradation
P Saraza-Canflanca, H Carrasco-Lopez, A Santana-Andreo, P. Brox, R Castro-Lopez, E. Roca, F. V. Fernandez, Microelectronics Reliability, vol. 118, 114049, 2021.
DOI: 10.1016/j.microrel.2021.114049.
2. An Efficient Transformer Modeling Approach for mm-Wave Circuit Design
Fabio Passos, Elisenda Roca, Javier Sieiro, Rafael Castro-Lopez, Francisco V. Fernandez, AEU - International Journal of Electronics and Communications, vol. 128, 153496, 2021.
DOI: 10.1016/j.aeue.2020.153496.
3. Statistical threshold voltage shifts caused by BTI and HCI at nominal and accelerated conditions
J. Diaz-Fortuny, P. Saraza-Canflanca, R. Rodriguez, J.Martin-Martinez, R. Castro-Lopez, E. Roca, F. V. Fernandez, M. Nafria, Solid-State Electronics, vol. 185, 108037, 2021.
DOI: 10.1016/j.sse.2021.108037.
4. Statistical Characterization of Time-Dependent Variability Defects Using the Maximum Current Fluctuation
P Saraza-Canflanca, J Martin-Martinez, R Castro-Lopez, E Roca, R Rodriguez, FV Fernandez, M Nafria, IEEE Transactions on Electron Devices, 2021.
DOI: 10.1109/TED.2021.3086448.
5. Insights into the Dynamics of Coupled VO2 Oscillators for ONNs
Juan Núñez, José M. Quintana, María J. Avedillo, Manuel Jiménez, Aida Todri-Sanial, Elisabetta Corti, Siegfried Karg, Bernabé Linares-Barranco, IEEE Transactions on Circuits and Systems II: Express Briefs, 2021.
DOI: 10.1109/TCSII.2021.3085133.
6. Oscillatory Neural Networks Using VO2 Based Phase Encoded Logic
Juan Núñez, María J. Avedillo, Manuel Jiménez, José M. Quintana, Aida Todri-Sanial, Elisabetta Corti, Siegfried Karg, Bernabé Linares-Barranco, Frontiers in Neuroscience, vol. 15, pp. 442 2021.
DOI: 10.3389/fnins.2021.655823.
7. Unified RTN and BTI statistical compact modeling from a defect-centric perspective
G. Pedreira, J. Martin-Martinez, P. Saraza-Canflanca, R. Castro-Lopez, R. Rodriguez, E. Roca, F.V. Fernandez, M. Nafria, Solid-State Electronics, vol. 185, 108112, 2021.
DOI: 10.1016/j.sse.2021.108112.
8. Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs
António Canelas, Fábio Passos, Nuno Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V Fernández, IEEE Access, vol. 9, pp. 124152-124164, 2021.
DOI: 10.1109/ACCESS.2021.3110758.
9. Gate-Level Design Methodology for Side-Channel Resistant Logic Styles using TFETs
I.M. Delgado-Lozano, E. Tena-Sánchez, J. Núñez and A.J. Acosta, IEEE Embedded Systems Letters, vol. 14, no. 2, pp 99-102, 2021.
10. How Frequency Injection Locking Can Train Oscillatory Neural Networks to Compute in Phase
A. Todri-Sanial, S. Carapezzi, C. Delacour, M. Abernot, T. Gil, Elisabetta Corti, S.F. Karg, J. Nüñez, M. Jiménez, M.J. Avedillo and B. Linares-Barranco, IEEE Transactions on Neural Networks and Learning Systems, vol. 33, no. 5, pp 1996-2009, 2021.
DOI: 10.1109/TNNLS.2021.3107771
11. Digital Implementation of Oscillatory Neural Network for Image Recognition Applications
J. Núñez, J.M. Quintana, M.J. Avedillo, M. Jiménez, A. Todri-Sanial, E. Corti, S. Karg and B. Linares-Barranco, Frontiers in Neuroscience, vol. 15, article 713054, 2021.
DOI: 10.3389/fnins.2021.713054
12. Insights into the Dynamics of Coupled VO2 Oscillators for ONNs
M. Abernot, T. Gil, M. Jiménez, J. Núñez, M.J. Avellido, B. Linares-Barranco, T. Gonos, T. Hardelin and A. Todri-Sanial, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 10, pp 3356-3360, 2021.
DOI: 10.1109/TCSII.2021.3085133
13. Hardware Implementation of Differential Oscillatory Neural Networks using VO2-based Oscillators and Memristor-Bridge Circuits
J. Shamsi, M.J. Avedillo, B. Linares-Barranco and T. Serrano-Gotarredona. Frontiers in Neuroscience, vol. 15, article 674567, 2021.
DOI: 10.3389/fnins.2021.674567
International Conferences
1. Circuit reliability prediction: challenges and solutions for the device time-dependent variability characterization roadblock
M Nafria, J Diaz-Fortuny, P Saraza-Canflanca, J Martin-Martinez, E Roca, R Castro-Lopez, R Rodriguez, P Martin-Lloret, A Toro-Frias, D Mateo, E Barajas, X Aragones, FV Fernandez, Proceedings IEEE Latin America Electron Devices Conference (LAEDC), 2021.
2. A complete smart approach for the RTN characterization and modelling of scaled MOSFETs
J Martin-Martinez, G. Pedreira, P Saraza-Canflanca, J Diaz-Fortuny, R Castro-Lopez, R Rodriguez, E Roca, X Aymerich, FV Fernandez, M Nafria, Proceedings Spanish Conference on Electron Devices (CDE), 2021.
3. Dealing with hierarchical partitioning in bottom-up design methodologies
F Passos, P Saraza-Canflanca, R Castro-Lopez, E Roca, FV Fernandez, Proceedings International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design (SMACD), 2021.
4. Simulating the impact of Random Telegraph Noise on integrated circuits
Pablo Saraza-Canflanca, Eros Camacho-Ruiz, Rafael Castro-Lopez, Elisenda Roca, Javier Martin-Martinez, Rosana Rodriguez, Montserrat Nafria, Francisco V Fernandez, Proceedings International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design (SMACD), 2021.
5. A study of SRAM PUFs reliability using the Static Noise Margin
Eros Camacho-Ruiz, Pablo Saraza-Canflanca, Rafael Castro-Lopez, Elisenda Roca, Piedad Brox, Francisco V Fernandez, Proceedings International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design (SMACD), 2021.
