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Aplicaciones Digitales y Soluciones de Medida con
Osciloscopios.
6 Marzo 2015
Se buscan candidatos para trabajar en un proyecto de investigación, en el área de Tecnología Electrónica y de las Comunicaciones, y con posibilidad de desarrollar un trabajo de tesis doctoral. Proyecto de investigación MIXCELL: Desarrollo de Microsistemas Integrados para Experimentación con Cultivos Celulares, del Plan Estatal 2013-2016 de Excelencia.
Convocatoria abierta. Periodo de admisión de solicitudes: hasta el 31 de Enero de 2015.
Mixed-signal & RF in Future Consumer Devices: Expected Changes in Design, Characterization and Production Test.
Jochen Rivoir, Fellow en Advantest Europe GmbH.
23 Enero 2015
♦ Defensas de Trabajos Fin de Máster
- Implementation of a Base-band Digital Receiver for 2.4-GHz Zigbee Protocol.
Blas Molina
- Diseño y optimización de inductores integrados para comunicaciones inalámbricas.
David Ollero
- Generación de identificadores no clonables y números verdaderamente aleatorios a partir de celdas de memoria estáticas.
Miguel Ángel Prada
12 Enero 2015

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75 aniversario del Consejo Superior de Investigaciones Científicas (CSIC)

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Últimas publicaciones
On-chip sinusoidal signal generation with harmonic cancelation for analog and mixed-signal BIST applications  »
This work presents a technique for the on-chip generation of analog sinusoidal signals with high spectral quality and reduced circuitry resources. The proposed generation technique consists of a modified low-order analog filter, that provides a sinusoidal output as response to a DC input, combined with a harmonic cancellation strategy to improve the linearity of the generated signal. The proposed generator has the attributes of digital programming and control, low area overhead, and low design effort, which make this approach very suitable as test stimulus generator for built-in test applications. An integrated prototype designed in a 180 nm CMOS technology is presented in order to show the feasibility of the technique. Results obtained from the prototype show a THD around -80 dB.

Journal Paper - Analog Integrated Circuits and Signal Processing, vol. 82, no. 1, pp 67-79, 2015
SPRINGER
DOI: 10.1007/s10470-014-0456-0   » doi
ISSN: 0925-1030
M. Barragan, G. Leger, D. Vazquez and A. Rueda
5x5 SPAD Matrices for the Study of the Trade-offs between Fill Factor, Dark Count Rate and Crosstalk in the Design of CMOS Image Sensors  »
CMOS Single Photon Avalanche Diodes (SPADs) are a dedicated type of photodetectors that are attracting increasing interest. Crosstalk and fill factor are magnitudes that become important when dealing with arrays of SPADs. There are tradeoffs that involve these two magnitudes and dark count rate (DCR) which are of great interest for the implementation of image sensors. A set of 5x5 matrices of SPADs with different sizes and shapes is designed to study the relationships between FF, crosstalk and DCR, and conceive an accurate behavioural model of SPAD arrays. The testchip is fully operative and preliminary experimental results are presented.

Conference Paper - 10th Conference on Ph.D Research in Microelectronics and Electronics PRIME 2014
M. Moreno-García, R. del Río, Ó. Guerra, and Á. Rodríguez-Vázquez
Live Demo: Real-time Focal-plane Face Obfuscation through Programmable Pixelation  »
Privacy concerns are hindering the introduction of smart camera networks in application scenarios like retailing analytics, factories or elderly care. Indeed, there is usually no need of dealing with sensitive data when it comes to carrying out a meaningful visual analysis in these scenarios. Time spent by customers in front of a showcase, trajectories of workers around a manufacturing site or fall detection in a nursing home are three examples where video analytics can be performed without compromising privacy. But still the idea of networked cameras pervasively collecting data generates social rejection in the face of sensitive information being tampered by hackers or misused by legitimate users. New strategies must be developed in order to ensure privacy from the very point where sensitive data are generated: the sensors. Protection measures embedded on-chip at the front-end sensor of each network node significantly reduce the number of trusted system components as well as the impact of potential software flaws. In this demonstration, we present a full-custom QVGA vision sensor that can be reconfigured to implement programmable pixelation of image regions at the focal plane. According to the literature, pixelation provides the best performance in terms of balance between privacy protection and intelligibility of the surveyed scene.

Conference Paper - Workshop on Architecture of Smart Cameras WASC 2014
J. Fernández-Berni, R. Carmona-Galán, R. del Río, J.A. Leñero-Bardallo, R. Kleihorsty, W. Philipsy and Á. Rodríguez-Vázquez
Embedded Face Detection Application based on Local Binary Patterns  »
In computer vision during the recent years a new paradigm for object detection has stimulated researchers and designers interest. The foundation of this new paradigm is the Local Binary Pattern (LBP) which is a nonparametric operator that efficiently extracts the features of local structures in images. This communication describes a software embedded implementation of LBP based algorithm for object detection, in particular targeting frontal face detection.

Conference Paper - 11th IEEE International Conference on Embedded Software and Systems ICESS 2014
L. Acasandrei and A. Barriga
Diseño de una librería de módulos IP de interfaces con el bus AMBA  »
Esta comunicación describe el diseño de módulos IP (Intellectual Property) de la interfaz estándar de comunicación más utilizada, el bus AMBA. Se plantea el diseño de interfaces de módulos maestros y esclavos, para los buses APB, AHB, AXI y AXI-Stream. Los módulos IP que se presentan pueden emplearse en sistemas con una gran variedad limitaciones de diseño (baja velocidad hasta aplicaciones de alta velocidad de transmisión, bajo consumo de potencia, etc). Para las interfaces de bus APB esclavo y bus AHB maestro/esclavo se proporciona un entorno de desarrollo para el diseño y simulación basado en la librería GRLIB.

Conference Paper - Jornadas de Computación Reconfigurable y Aplicaciones JCRA 2014
L. Acasandrei and A. Barriga
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