Consejo Superior de Investigaciones Científicas · Universidad de Sevilla
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♦ Oferta de empleo. Contrato predoctoral FPI
Se buscan candidatos para un contrato predoctoral para la formación de doctores en el área de Tecnología Electrónica y de Comunicaciones asociada al Proyecto de Investigación TOGETHER (Dispositivos, circuitos y arquitecturas fiables y de bajo consumo para IoT).  [+ info] »
♦ Oferta de empleo. Titulado Superior
Se buscan candidatos para un contrato de Titulado Superior en el área de Tecnología Electrónica y de Comunicaciones, asociado al Proyecto de Investigación MARAGDA (Aproximación multi-nivel al diseño orientado a la fiabilidad de circuitos integrados analógicos y digitales).  [+ info] »
♦ Defensa de Tesis Doctoral
Diseño CMOS de Sistemas de Front-End para Instrumentación Ambiental en Marte.
Samuel Sordo Ibáñez
15 Diciembre 2016
♦ Defensa de Trabajos Fin de Máster
- A Low Cost Fluorescence Lifetime Measurement System Based on SPAD Detectors and FPGA Processing.
Nil Franch Masdeu
- Diseño de Bloques Básicos de un ADC para Aplicaciones de Monitorización de Salud Estructural en el Ámbito de la Aviación.
Albert Álvarez Carulla
- Optimización de ataques criptográficos laterales mediante hardware empotrado.
Salvador Canas Moreno
- Desarrollo de técnicas T-test para medida de vulnerabilidad de circuitos criptográficos.
Irene Durán Menor de Gaspar
14 Diciembre 2016

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Últimas publicaciones
Comparison of TFETs and CMOS using optimal design points for power-speed trade-offs  »
Tunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means of overcoming the power density and energy inefficiency limitations of CMOS technology. In this paper, the evaluation and the comparison of the performance of distinct fan-in logic gates, using a set of widely accepted power-speed metrics, are addressed for five projected tunnel transistor (TFET) technologies and four MOSFET and FinFET transistors. The impact of logic depth, switching activity and minimum supply voltage has been also included in our analysis. Provided results suggest that benefits in terms of a certain metric, in which a higher weight is placed on power or delay, are strongly determined by the selected device. Particularly, the suitability of two of the explored TFET technologies to improve CMOS performance for different metrics is pointed out. A circuit level benchmark is evaluated to validate our analysis.

Journal Paper - IEEE Transactions on Nanotechnology, vol. 16, no, 1, pp 83-89, 2017 IEEE
DOI: 10.1109/TNANO.2016.2629264    ISSN: 1536-125X    » doi
J. Núñez and M.J. Avedillo
Side-channel analysis of the modular inversion step in the RSA key generation algorithm  »
This paper studies the security of the RSA key generation algorithm with regard to side-channel analysis and presents a novel approach that targets the simple power analysis (SPA) vulnerabilities that may exist in an implementation of the binary extended Euclidean algorithm (BEEA). The SPA vulnerabilities described, together with the properties of the values processed by the BEEA in the context of RSA key generation, represent a serious threat for an implementation of this algorithm. It is shown that an adversary can disclose the private key employing only one power trace with a success rate of 100 % - an improvement on the 25% success rate achieved by the best side-channel analysis carried out on this algorithm. Two very different BEEA implementations are analyzed, showing how the algorithm's SPA leakages could be exploited. Also, two countermeasures are discussed that could be used to reduce those SPA leakages and prevent the recovery of the RSA private key.

Journal Paper - International Journal of Circuit Theory and Applications, article in press, 2016 JOHN WILEY & SONS
DOI: 10.1002/cta.2283    ISSN: 0098-9886    » doi
A. Cabrera Aldaya, R. Cuiman Márquez, A.J. Cabrera Sarmiento and S. Sánchez-Solano
Low-cost dedicated hardware IP modules for background subtraction in embedded vision systems  »
This paper presents the design and implementation of dedicated hardware IP modules for background subtraction, which are suitable to be implemented in embedded vision systems and are efficient in terms of performance, resource consumption, and operational speed. To achieve this goal, a comprehensive experimental study of different algorithms has been carried out by evaluating a wide range of quality parameters. From the results of this analysis, five candidate algorithms were selected and implemented using a model-based design methodology supported by Matlab and Xilinx FPGA tools. Using only the internal block memory available in the FPGA, they provide adequate solutions for processing low-resolution images with CIF and QCIF formats.

Journal Paper - Journal of Real-Time Image Processing, vol. 12, no. 4, pp 681-695, 2016 SPRINGER
DOI: 10.1007/s11554-014-0455-5    ISSN: 1861-8200    » doi
E. Calvo-Gallego, P. Brox and S. Sanchez-Solano
An address event representation-based processing system for a biped robot  »
In recent years, several important advances have been made in the fields of both biologically inspired sensorial processing and locomotion systems, such as Address Event Representation-based cameras (or Dynamic Vision Sensors) and in human-like robot locomotion, e.g,. the walking of a biped robot. However, making these fields merge properly is not an easy task. In this regard, Neuromorphic Engineering is a fast-growing research field, the main goal of which is the biologically inspired design of hybrid hardware systems in order to mimic neural architectures and to process information in the manner of the brain. However, few robotic applications exist to illustrate them. The main goal of this work is to demonstrate, by creating a closed-loop system using only bio-inspired techniques, how such applications can work properly. We present an algorithm using Spiking Neural Networks (SNN) for a biped robot equipped with a Dynamic Vision Sensor, which is designed to follow a line drawn on the floor. This is a commonly used method for demonstrating control techniques. Most of them are fairly simple to implement without very sophisticated components; however, it can still serve as a good test in more elaborate circumstances. In addition, the locomotion system proposed is able to coordinately control the six DOFs of a biped robot in switching between basic forms of movement. The latter has been implemented as a FPGA-based neuromorphic system. Numerical tests and hardware validation are presented.

Journal Paper - International Journal of Advanced Robotic Systems, vol. 13, no. 1, 2016 SAGE
DOI: 10.5772/62321    ISSN: 1729-8806    » doi
U. Jaramillo-Avila, H. Rostro-Gonzalez, L.A. Camuñas-Mesa, R.J. Romero-Troncoso and B. Linares-Barranco
Special Issue: highlights from the IEEE Latin American Symposium on Circuits and Systems LASCAS 2015  »
We are very pleased to present to the readers of the Springer Journal on Analog Integrated Circuits and Signal Processing (ALOG) a selection of extended papers from the 6th edition of the IEEE Latin America Symposium on Circuits and Systems (LASCAS 2015). The symposium, a forum for discussion of the latest technical novelties on circuits and systems topics, took place in Montevideo-Uruguay, organized by the local IEEE-CAS chapter. LASCAS is an annual meeting that brings together researchers, industry, engineers, students interested in circuits and systems across a wide spectrum of scientific and technological fields: VLSI, analog and digital signal processing, biomedical circuits and systems, multimedia systems, nanoelectronics, neural networks, communications circuits, CAD, power electronic circuits, sensors, among others. The conference is a great opportunity for colleagues operating in very different areas of industrial, scientific, and technological endeavor to come together and create the basis for renewed collaboration.

Journal Paper - Analog Integrated Circuits and Signal Processing, vol. 89, no. 3, pp 507-509, 2016 SPRINGER
DOI: 10.1007/s10470-016-0871-5    ISSN: 0925-1030    » doi
J.M. de la Rosa, C. Galup-Montoro, F. Silveira and A. Arnaud

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