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A recruitment procedure is open for the project 'SUMHAL: Sustainability for Mediterranean Hotspots in Andalusia integrating LifeWatch ERIC'.
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A recruitment procedure is open for the project 'SPIRS: Secure Platform for ICT systems rooted at the Silicon Manufacturing process'.
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Researchers from the Instituto de Microelectrónica de Sevilla in collaboration with researchers from the Universidad de Cádiz have developed a detector to measure the energy of electrons in SEM microscopes (Scanning Electron Microscope) that allows to measure both the intensity and the energy of the electrons generated.
April 16, 2021
The CSIC, through the Instituto de Microelectrónica de Sevilla, is leading the SPIRS project, led by researcher Piedad Brox, a project to increase the security of digital devices without the need to store keys.
March 25, 2021

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Recent publications
Oscillatory Neural Networks using VO2 based Phase Encoded Logic  »
Nano-oscillators based on phase-transition materials are being explored for the implementation of different non-conventional computing paradigms. In particular, vanadium dioxide (VO 2) devices are used to design autonomous non-linear oscillators from which oscillatory neural networks (ONNs) can be developed. In this work, we propose a new architecture for ONNs in which sub-harmonic injection locking (SHIL) is exploited to ensure that the phase information encoded in each neuron can only take two values. In this sense, the implementation of ONNs from neurons that inherently encode information with two-phase values has advantages in terms of robustness and tolerance to variability present in VO2 devices. Unlike conventional interconnection schemes, in which the sign of the weights is coded in the value of the resistances, in our proposal the negative (positive) weights are coded using static inverting (non-inverting) logic at the output of the oscillator. The operation of the proposed architecture is shown for pattern recognition applications.

Journal Paper - Frontiers in Neuroscience, vol. 15, article 655823, 2021 FRONTIERS MEDIA
DOI: 10.3389/fnins.2021.655823    ISSN: 1662-453X    » doi
J. Núñez, M.J. Avedillo, M. Jiménez, J.M. Quintana, A. Todri-Sanial, E. Corti, S. Karg and B. Linares-Barranco
The Use of High-Intensity Focused Ultrasound for the Rewarming of Cryopreserved Biological Material  »
High-intensity focused ultrasound (HIFU) has been used in different medical applications in the last years. In this work, we present for the first time the use of HIFU in the field of cryopreservation, the preservation of biological material at low temperatures. An HIFU system has been designed with the objective of achieving a fast and uniform rewarming in organs, key to overcome the critical problem of devitrification. The finite-element simulations have been carried out using COMSOL Multiphysics software. An array of 26 ultrasonic transducers was simulated, achieving an HIFU focal area in the order of magnitude of a model organ (ovary). A parametric study of the warming rate and temperature gradients, as a function of the frequency and power of ultrasonic waves, was performed. An optimal value for these parameters was found. The results validate the appropriateness of the technique, which is of utmost importance for the future creation of cryopreserved organ banks.

Journal Paper - IEEE Transactions on Ultrasonics Ferroelectrics and Frequency Control, vol. 68, no. 3, pp 599-607, 2021 IEEE
DOI: 10.1109/TUFFC.2020.3016950    ISSN: 0885-3010    » doi
A. Olmo, P. Barroso, F. Barroso and R. Risco
Efficient Spike-Driven Learning With Dendritic Event-Based Processing  »
A critical challenge in neuromorphic computing is to present computationally efficient algorithms of learning. When implementing gradient-based learning, error information must be routed through the network, such that each neuron knows its contribution to output, and thus how to adjust its weight. This is known as the credit assignment problem. Exactly implementing a solution like backpropagation involves weight sharing, which requires additional bandwidth and computations in a neuromorphic system. Instead, models of learning from neuroscience can provide inspiration for how to communicate error information efficiently, without weight sharing. Here we present a novel dendritic event-based processing (DEP) algorithm, using a two-compartment leaky integrate-and-fire neuron with partially segregated dendrites that effectively solves the credit assignment problem. In order to optimize the proposed algorithm, a dynamic fixed-point representation method and piecewise linear approximation approach are presented, while the synaptic events are binarized during learning. The presented optimization makes the proposed DEP algorithm very suitable for implementation in digital or mixed-signal neuromorphic hardware. The experimental results show that spiking representations can rapidly learn, achieving high performance by using the proposed DEP algorithm. We find the learning capability is affected by the degree of dendritic segregation, and the form of synaptic feedback connections. This study provides a bridge between the biological learning and neuromorphic learning, and is meaningful for the real-time applications in the field of artificial intelligence.

Journal Paper - Frontiers in Neuroscience, vol. 15, article 601109, 2021 FRONTIERS MEDIA
DOI: 10.3389/fnins.2021.601109    ISSN: 1662-453X    » doi
S. Yang, T. Gao, J. Wang, B. Deng, B. Lansdell and B. Linares-Barranco
Neuromorphic Low-power Inference on Memristive Crossbars with On-chip Offset Calibration  »
Monolithic integration of silicon with nano-sized Redox-based resistive Random-Access Memory (ReRAM) devices opened the door to the creation of dense synaptic connections for bio-inspired neuromorphic circuits. One drawback of OxRAM based neuromorphic systems is the relatively low ON resistance of OxRAM synapses (in the range of just a few kilo-ohms). This requires relatively large currents (many micro amperes per synapse), and therefore imposes strong driving capability demands on peripheral circuitry, limiting scalability and low power operation. After learning, however, a read inference can be made low-power by applying very small amplitude read pulses, which require much smaller driving currents per synapse. Here we propose and experimentally demonstrate a technique to reduce the amplitude of read inference pulses in monolithic neuromorphic CMOS OxRAM-synaptic crossbar systems. Unfortunately, applying tiny read pulses is non-trivial due to the presence of random DC offset voltages. To overcome this, we propose finely calibrating DC offset voltages using a bulk-based three-stage on-chip calibration technique. In this work, we demonstrate spiking pattern recognition using STDP learning on a small 4x4 proof-of-concept memristive crossbar, where on-chip offset calibration is implemented and inference pulse amplitude could be made as small as 2mV. A chip with pre-synaptic calibrated input neuron drivers and a 4x4 1T1R synapse crossbar was designed and fabricated in the CEA-LETI MAD200 technology, which uses monolithic integration of OxRAMs above ST130nm CMOS. Custom-made PCBs hosting the post-synaptic circuits and control FPGAs were used to test the chip in different experiments, including synapse characterization, template matching, and pattern recognition using STDP learning, and to demonstrate the use of on-chip offset-calibrated low-power amplifiers. According to our experiments, the minimum possible inference pulse amplitude is limited by offset voltage drifts and noise. We conclude the paper with some suggestions for future work in this direction.

Journal Paper - IEEE Access, first online, 2021 IEEE
DOI: 10.1109/ACCESS.2021.3063437    ISSN: 2169-3536    » doi
C. Mohan, L.A. Camuñas-Mesa, J.M. de la Rosa, E. Vianello, T. Serrano-Gotarredona and B. Linares-Barranco
Behavioral and Physical Unclonable Functions (BPUFs): SRAM Example  »
Physical Unclonable Functions (PUFs) have gained a great interest for their capability to identify devices uniquely and to be a lightweight primitive in cryptographic protocols. However, several reported attacks have shown that virtual copies (mathematical clones) as well as physical clones of PUFs are possible, so that they cannot be considered as tamper-resistant or tamper-evident, as claimed. The solution presented in this article is to extend the PUFs reported until now, which are only physical, to make them Behavioral and Physical Unclonable Functions (BPUFs). Given a challenge, BPUFs provide not only a physical but also a behavioral distinctive response caused by manufacturing process variations. Hence, BPUFs are more difficult to attack than PUFs since physical and behavioral responses associated to challenges have to be predicted or cloned. Behavioral responses that are obtained from several measurements of the physical responses taken at several sample times are proposed. In this way, the behavioral responses can detect if the physical responses are manipulated. The analysis done for current PUFs is extended to allow for more versatility in the responses that can be considered in BPUFs. Particularly, Jaccard instead of Hamming distances are proposed to evaluate the similarity of behavioral responses. As example to validate the proposed solution, BPUFs based on Static Random-Access Memories (SRAM BPUFs), with one physical and one behavioral responses to given challenges, were analyzed experimentally using integrated circuits fabricated in a 90-nm CMOS technology. If an attacker succeeds in cloning the physical responses as reported, but does not attack the way to obtain the behavioral responses, the attacker fails on SRAM BPUFs. The highest probability to succeed in cloning the behavioral responses with a brute-force attack was estimated from experimental results as $1.5 \cdot 10^{-34}$ , considering the influence of changes in the operating conditions (power supply voltage, temperature, and aging).

Journal Paper - IEEE Access, vol. 9, pp 23751-23763, 2021 IEEE
DOI: 10.1109/ACCESS.2021.3055493    ISSN: 2169-3536    » doi
M.A. Prada-Delgado and I. Baturone

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