News


Science Fair 2024
The IMSE participates in the 22nd edition of the Science Fair

The Instituto de Microelectrónica de Sevilla has been present for another year at the Science Fair developed by the Sociedad Andaluza para la Divulgación de la Ciencia (SADC). This event was held from May 8 to 10 at the Exhibition and Congress Palace in Seville.
May 15, 2024

READ MORE

Science is Wonderful 2024
IMSE-CNM takes part in European Comission's science fair 'Science is Wonderful! 2024'

'Science is Wonderful!', the annual international science fair organised by the European Commission, took place this year in Brussels on the 25th and 26th of April. This edition has seen the participation of a team from Instituto de Microelectrónica de Sevilla (IMSE-CNM).
May 3, 2024

READ MORE

CSIC Technologies 2024
An IMSE patent among the 100 CSIC technologies with the greatest commercial potential

On the occasion of World Industrial and Intellectual Property Day, which is celebrated every year on April 26, the Consejo Superior de Investigaciones Científicas (CSIC) has presented a catalog that compiles a hundred of its cutting-edge technologies in areas of knowledge.
April 29, 2024

READ MORE

Angel Rodriguez Fama Award
The US professor and IMSE researcher Ángel Rodríguez Vázquez receives the Fama award

On March 19, 2024, the Universidad de Sevilla held the ceremony to present the Fama Awards for research career.
March 22, 2024

READ MORE

PERTE Chip Chairs Call
The call for PERTE Chip Chairs has been provisionally resolved

The Universidad de Sevilla obtains a PERTE Chip Chair (€4.2M), with the third best score out of 17 proposals, with a project led by IMSE professors and whose team includes 39 researchers from our center.
March 6, 2024

READ MORE

Eros Camacho Doctoral Thesis
Announcement Public Defense of Doctoral Thesis

The public defense event of the Doctoral Thesis of Eros Camacho Ruiz within the framework of the doctoral program in Physical Sciences and Technologies of the Universidad de Sevilla will be held on March 13, 2024 at 11:00 a.m. at the Instituto de Microelectrónica de Sevilla.

READ MORE

PREVIOUS EVENTS & NEWS

New Director of the IMSE-CNM


IMSE researcher Teresa Serrano Gotarredona has been appointed as the new Director of the Instituto de Microelectrónica de Sevilla.

READ MORE

Education at IMSE


- Doctoral Studies
- Master Studies
- Degree Studies
- Final Degree Projects
- Internships

READ MORE

Recent publications


A CMOS-compatible oscillation-based VO2 Ising machine solver
O. Maher, M. Jiménez, C. Delacour, N. Harnack, J. Núñez, M.J. Avedillo, B. Linares-Barranco, A. Todri-Sanial, G. Indiveri and S. Karg
Journal Paper · Nature Communications vol. 15, article 3334, 2024
NATURE    ISSN: 2041-1723
abstract      doi      

Phase-encoded oscillating neural networks offer compelling advantages over metal-oxide-semiconductor-based technology for tackling complex optimization problems, with promising potential for ultralow power consumption and exceptionally rapid computational performance. In this work, we investigate the ability of these networks to solve optimization problems belonging to the nondeterministic polynomial time complexity class using nanoscale vanadium-dioxide-based oscillators integrated onto a Silicon platform. Specifically, we demonstrate how the dynamic behavior of coupled vanadium dioxide devices can effectively solve combinatorial optimization problems, including Graph Coloring, Max-cut, and Max-3SAT problems. The electrical mappings of these problems are derived from the equivalent Ising Hamiltonian formulation to design circuits with up to nine crossbar vanadium dioxide oscillators. Using sub-harmonic injection locking techniques, we binarize the solution space provided by the oscillators and demonstrate that graphs with high connection density (μ > 0.4) converge more easily towards the optimal solution due to the small spectral radius of the problema’s equivalent adjacency matrix. Our findings indicate that these systems achieve stability within 25 oscillation cycles and exhibit power efficiency and potential for scaling that surpasses available commercial options and other technologies under study. These results pave the way for accelerated parallel computing enabled by large-scale networks of interconnected oscillators.

Cryptographic Security Through a Hardware Root of Trust
L.F. Rojas-Muñoz, S. Sánchez-Solano, M.C. Martínez-Rodríguez, E. Camacho-Ruiz, P. Navarro-Torrero, A. Karmakar, C. Fernández-García, E. Tena-Sánchez, F.E. Potestad-Ordóñez, A. Casado-Galán, P. Ortega-Castro, A.J. Acosta-Jiménez, C.J. Jiménez-Fernández and P. Brox
Conference · Applied Reconfigurable Computing. Architectures, Tools, and Applications (ARC), 2024
abstract      doi      

This work presents a novel approach to a Hardware Root-of-Trust that leverages System-on-Chip technology for the implementation of hardware cryptographic functions. Taking advantage of the processing power of a System-on-Chip, the solution established promotes hardware-based security solutions over software-only solutions. The proposed Root-of-Trust, developed around a Xilinx Zynq-7000 SoC device, integrates components based on cryptographic algorithms and physical phenomena. This innovative Root-of-Trust is tailored to support a spectrum of security tasks within cryptographic systems, including device-specific identifiers and keys, encryption and decryption, hashing, and signature generation and verification. The study adopts a unified design methodology, capitalizing on collaborative efforts to efficiently develop hardware primitives that significantly contribute to enhancing security in computing environments. Aligned with the advantages of reconfigurable hardware, this Hardware Root-of-Trust addresses the critical need for robust hardware-level security and introduces a set of countermeasures to fortify the design against potential threats.

A Small-Area 2nd-Order Adder-Less Continuous-Time ΔΣ Modulator With Pulse Shaping FIR DAC for Magnetic Sensing
M. Srivastava, A. Ferro, A. Sidun, P. Cantillon-Murphy, Daniel O’Hare, K. O’Donoghue and J.M. de la Rosa
Journal Paper · IEEE Open Journal of Circuits and Systems (Volume 5), 2024
IEEE    ISSN: 2644-1225
abstract      doi      

This work presents a small-area 2nd-order continuous-time ΔΣ Modulator (CTΔΣM) with a single low dropout regulator (LDO) serving as both the power supply for the CTΔΣM and reference voltage buffer. The CTΔΣM is used for digitising very low amplitude signals in applications such as magnetic tracking for image-guided and robotic surgery. A cascade of integrators in a feed-forward architecture implemented with an adder-less architecture has been proposed to minimise the silicon area. In addition, a novel continuous-time pulse-shaped digital-to-analog converter (CT-PS DAC) is proposed for excess loop delay (ELD) compensation to simplify the current drive requirements of the reference voltage buffer. This enables a single low-dropout (LDO) voltage regulator to generate both power supply and Vref for the DAC. The circuit has been designed in 65-nm CMOS technology, achieving a peak 82-dB SNDR and 91-dB DR within a signal bandwidth of 20 kHz and the CTΔΣM consumes 300 μW of power when clocked at 10.24 MHz. The CTΔΣM achieves a state-of-the-art area of 0.07 mm.

A Control-Bounded Quadrature Leapfrog ADC
H. Malmberg, F. Feyling and J.M. de la Rosa
Journal Paper · IEEE Transactions on Circuits and Systems I: Regular Papers, 2024
IEEE    ISSN: 1549-8328
abstract      doi      

In this paper, the design flexibility of the control-bounded analog-to-digital converter principle is demonstrated. A band-pass analog-to-digital converter is considered as an application and case study. We show how a low-pass control-bounded analog-to-digital converter can be translated into a band-pass version where the guaranteed stability, converter bandwidth, and signal-to-noise ratio are preserved while the center frequency for conversion can be positioned freely. The proposed converter is validated with behavioral simulations on several filter orders, center frequencies, and oversampling ratios. Additionally, we consider an op-amp circuit realization where the effects of first-order op-amp non-idealities are shown. Finally, robustness against component variations is demonstrated by Monte Carlo simulations.

ALL PUBLICATIONS

IMSE corporate video


What we do


Our main area of specialization is the design of CMOS analog and mixed-signal integrated circuits and their use in different application contexts such as wireless communications, data conversion, smart imagers & vision sensors, biomedical devices, cybersecurity, neuromorphic computing and space technologies.

The IMSE-CNM staff consists of approximately one hundred people, including scientists and support personnel. IMSE-CNM employees are involved in advancing scientific knowledge, designing high level scientific-technical solutions and in technology transfer.

READ MORE

IMSE-related sites