Empleo en el IMSE
Several open calls


Interview Rosario Arjona
Biometrics and its use in electronic transactions

Interview with IMSE researcher Rosario Arjona on the importance of privacy and the use of biometric techniques in electronic transactions, instead of traditional character passwords.


Event Data Downscaling for Embedded Computer Vision

Presentation of the article 'Event Data Downscaling for Embedded Computer Vision' at VISAPP 2022 Conference.
Authors: Amélie Gruel, Jean Martinet, Teresa Serrano-Gotarredona and Bernabé Linares-Barranco.

Post on the La Cuadratura del Círculo blog
Post on the La Cuadratura del Círculo blog

Privacy first: trustworthy post-quantum pseudonyms of people and things.
Rosario Arjona López


Goit Project
European Project GOIT

The European project GOIT, one of whose coordinators is the IMSE researcher Piedad Brox, has been selected to be funded in the HORIZON-CL4-2021-DIGITAL-EMERGING-01 call with global funding of 1,994,328 €.


Visual Inference for IoT Systems
Book 'Visual Inference for IoT Systems: A Practical Approach'

Publication of the book 'Visual Inference for IoT Systems: A Practical Approach', by researchers Delia Velasco Montero, Jorge Fernández Berni and Ángel Rodríguez Vázquez



Education at IMSE

- Doctoral Studies
- Master Studies
- Degree Studies
- Final Degree Projects
- Internships


Recent publications

On the impact of the biasing history on the characterization of Random Telegraph Noise
P. Saraza-Canflanca, R. Castro-Lopez, E. Roca, J. Martin-Martinez, R. Rodriguez, M. Nafria and F.V. Fernandez
Journal Paper · IEEE Transactions on Instrumentation and Measurement, first online, 2022
IEEE    ISSN: 0018-9456
resumen      doi      

Random Telegraph Noise is a time-dependent variability phenomenon that has gained increased attention during the last years, especially in deeply-scaled technologies. In particular, there is a wide variety of works presenting different techniques designed to analyze current traces in scaled FET devices displaying Random Telegraph Noise, and others focused on modeling the phenomenon using the parameters extracted through such techniques. However, very little attention has been paid to the effects that the biasing conditions of the transistors prior to the measurements may have on the extraction of the parameters that characterize this phenomenon. This paper investigates how these biasing conditions actually impact the extracted results. Specifically, it is demonstrated that the results obtained when Random Telegraph Noise is measured immediately after the device is biased may lead to an overestimation of the Random Telegraph Noise impact with respect to situations in which the device has been previously biased for some time. This fact is, first, presented from a theoretical point of view, and, after, demonstrated experimentally through measurements obtained from a CMOS-transistor array.

Fully Parallel Stochastic Computing Hardware Implementation of Convolutional Neural Networks for Edge Computing Applications
C. Frasser, P. Linares-Serrano, I.D. de los Rios, A. Moran, E.S. Skibinsky-Gitlin, J. Font-Rossello, V. Canals, M. Roca, T. Serrano-Gotarredona and J.L. Rossello
Journal Paper · IEEE Transactions on Neural Networks and Learning Systems, first online, 2022
IEEE    ISSN: 2162-237X
resumen      doi      

Edge artificial intelligence (AI) is receiving a tremendous amount of interest from the machine learning community due to the ever-increasing popularization of the Internet of Things (IoT). Unfortunately, the incorporation of AI characteristics to edge computing devices presents the drawbacks of being power and area hungry for typical deep learning techniques such as convolutional neural networks (CNNs). In this work, we propose a power-and-area efficient architecture based on the exploitation of the correlation phenomenon in stochastic computing (SC) systems. The proposed architecture solves the challenges that a CNN implementation with SC (SC-CNN) may present, such as the high resources used in binary-to-stochastic conversion, the inaccuracy produced by undesired correlation between signals, and the complexity of the stochastic maximum function implementation. To prove that our architecture meets the requirements of edge intelligence realization, we embed a fully parallel CNN in a single field-programmable gate array (FPGA) chip. The results obtained showed a better performance than traditional binary logic and other SC implementations. In addition, we performed a full VLSI synthesis of the proposed design, showing that it presents better overall characteristics than other recently published VLSI architectures.


The Influence of MPPT Algorithms in the Lifespan of the Capacitor Across the PV Array
A. Alcaide, R. Gomez-Merchan, E. Zafra, E.P. Martin, J.M. López-Rodriguez, J.I. Leon, S. Vazquez and L.G. Franquelo
Journal Paper · IEEE Access, vol. 10, pp 40945 - 40952, 2022
IEEE    ISSN: 2169-3536
resumen      doi      

PV systems efficiency highly depends on the MPPT strategy to be implemented in the PV converter. Many MPPT methods on the literature are focused on improving the steady state and transient system performance extracting the maximum energy from the sun. In this paper, the impact of the MPPT methods in the PV converter is analyzed focusing the study on the capacitor across the PV array lifespan. The obtained results demonstrate that the low frequency PV voltage oscillations that are present in many MPPT methods have a large negative impact on this capacitor lifespan. Experimental and simulation results are presented in order to show that advanced MPPT methods, which avoid these low frequency oscillations, achieve higher capacitor lifespan values compared with the values obtained by applying well-known MPPT methods such as the perturb and observe or incremental conductance strategies.

Event Data Downscaling for Embedded Computer Vision
A. Gruel, J. Martinet, T. Serrano-Gotarredona and B. Linares-Barranco
Conference · International Conference on Computer Vision Theory and Applications VISAPP 2022

Event cameras (or silicon retinas) represent a new kind of sensor that measure pixel-wise changes in brightness and output asynchronous events accordingly. This novel technology allows for a sparse and energy-efficient recording and storage of visual information. While this type of data is sparse by definition, the event flow can be very high, up to 25M events per second, which requires significant processing resources to handle and therefore impedes embedded applications. Neuromorphic computer vision and event sensor based applications are receiving an increasing interest from the computer vision community (classification, detection, tracking, segmentation, etc.), especially for robotics or autonomous driving scenarios. Downscaling event data is an important feature in a system, especially if embedded, so as to be able to adjust the complexity of data to the available resources such as processing capability and power consumption. To the best of our knowledge, this works is the first attempt to formalize event data downscaling. In order to study the impact of spatial resolution downscaling, we compare several features of the resulting data, such as the total number of events, event density, information entropy, computation time and optical consistency as assessment criteria. Our code is available online at


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What we do

Our main area of specialization is the design of CMOS analog and mixed-signal integrated circuits and their use in different application contexts such as wireless communications, data conversion, smart imagers & vision sensors, biomedical devices, cybersecurity, neuromorphic computing and space technologies.

The IMSE-CNM staff consists of approximately one hundred people, including scientists and support personnel. IMSE-CNM employees are involved in advancing scientific knowledge, designing high level scientific-technical solutions and in technology transfer.


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