Electronic devices flood many aspects of our lives. The wondrous evolution of nano-CMOS technologies with the emergence of new materials and devices is behind it. The demand for integrated circuits (ICs) is not without challenges though: our modern digital economy and society requires them to be more functional, more reliable, safer and more secure, and fields like IoT, Cybersecurity and Highperformance computing are now priorities in many research agendas.
However, one critical obstacle in this evolution is variability, culprit for the device parametric fluctuations deriving in a reliability loss of the IC. Rising right after fabrication (TZV, Time-Zero Variability) or during the IC lifetime (TDV, Time-Dependent Variability), it ends up critically compromising its functionality or even cutting short its lifetime. If variability is undealt with, ICs will no longer be able to fulfil the capabilities of safety, security, and reliability.
VIGILANT faces up this challenge from two perspectives. It will first develop solutions and new design paradigms to lessen or tolerate variability; the goal is clear: mitigate its negative impact. Second, realizing variability has also a beneficial side, TZV and TDV will be exploited for hardware-based security. While this duality mitigation/exploitation is one key goal, there is another cross-cutting goal: the evaluation of several technologies and their potential for the duality, from the established bulk CMOS, through the versatile FDSOI, to beyond-CMOS alternatives like memristors. To undertake the goals, VIGILANT needs the complementary expertise of teams (IMSE, UAB and UPC) with a successful track record in the collaborative investigation of variability.